1. Field of the Invention
The present invention relates to a technique for analyzing a failure, defect or the like of a semiconductor device and, more particularly, to a technique for performing OBIC observation and luminous analysis for the semiconductor device.
2. Description of Related Art
It is indispensable to perform analysis of defects of a product which has been determined to be defective through various tests during a manufacturing process or after manufacturing of semiconductor device is completed, in order to improve fabrication yield and the quality of the semiconductor device. The general method for this failure analysis is as follows.
First, a point which induces a failure is found on a semiconductor chip by electrical analysis. Then, a wiring metal, an interlayer isolation iilm or the like is removed by etching or a sectional hole is formed by a focused ion beam, to observe the point causing the failure with an electron microscope or the like. The cause of a failure or a defect is found by these operations. As iora recent semiconductor device which is complicated and of high density, it is particularly important to find a portion causing a iailure or a deiect by the electrical analysis which is the first step.
As the first method of the aforementioned electrical analysis, a light beam irradiates a semiconductor chip to detect an OBIC current generated thereby. This OBIC analysis includes detection oi a defect of a p-n junction or thin silicon oxide film, detection of a latch up, and measurement of a voltage waveform.
As the second method of the electrical analysis, luminous analysis is available for detecting a defect of a p-n junction or a defect of thin silicon oxide film. According to this method, for example, a voltage is applied to a semiconductor chip experimentally in order to detect any weak light generated from the semiconductor chip.
First, the OBIC analysis will be described below. FIG. 7 is an example of conventional OBIC analysis for detecting a latch up, the example being explained in Daniel J. Burns et al: IEEE 21st annual proc. tel. phys., p118 (1983). Reference numeral 1 designates an optical microscope, in which an object lens 1a faces downward. A semiconductor chip 2 is mounted therebelow. A laser beam is transmitted from a laser beam source 3 and moved so as to scan the semiconductor chip along the X-axis and Y-axis by means of an X-Y mirror 4. Then, the laser beam irradiates the semiconductor chip 2 through the optical microscope. A voltage is applied to the semiconductor chip 2 by means of a bias power supply 5. The OBIC current which is generated by the irradiation with the light beam in the semiconductor chip 2 is amplified by means of an OBIC current amplifier 6a and converted to brightness. The brightness displayed on a display unit 8 by an interface circuit 7 in synchronism with the scanning by the X-Y mirror. Numeral 6b designates a zero point adjusting device. The OBIC current amplifier 6a, the zero point adjusting device 6b, the interface circuit 7 and the display 8 are controlled by means of a computer 9. As a result, it is possible to observe the distribution of an OBIC current on the surface of the semiconductor chip 2, that is, an OBIC image, so that the latch up or the like can be detected.
FIG. 8 is an example of conventional OBIC analysis system for measuring the waveform indicated in F. J.Henley: IEEE 22nd annual proc. ref. phys., p69(1984). The object lens 1a of the optical microscope 1 faces downward as in FIG. 7 and a semiconductor chip 2 is mounted therebelow. A laser irradiates the semiconductor chip 2 by means of the optical microscope 1. The OBIC current generated in the semiconductor chip 2 in response to irradiation by the laser beam is amplified by means of the OBIC current amplifier 6 and then converted to voltage waveform by means of a logic state analyzer 11. The converted product is displayed on the display 8 through the microcomputer 9. In FIG. 8, the representation of the laser beam source is omitted. Reference numeral 1b designates a beam lamp, numeral 1c designates a laser/beam scriptor, numeral 12 designates a TV camera, numeral 9a designates a keyboard, numeral 9b designates a floppy disk, and numeral 76 designates an X-Y stage.
In the system shown in FIG. 8, observation oi the semiconductor chip 2 for aligning the laser irradiating position is performed by means of the beam lamp 1b and detecting the reflected light by means of the TV camera. However, it is possible to represent an image of the surface of the semiconductor chip 2 on the display unit 8 by scanning with a laser beam projected by the X-Y mirror 4 (see FIG. 7) and then actuating the interface circuit 7 (see FIG. 7) which synchronizes light reflected by laser irradiation the scanning with laser beam as in the observation of the OBIC image shown in FIG. 7. Then, the laser irradiating position of the surface of the semiconductor chip for measuring the voltage waveform is fixed by moving the X-Y stage 16 along the X and Y-axes while laser beam is fixed to a single point. Observation of the OBIC image is performed by fixing the laser beam to a single point and scanning the X-Y stage 16 instead of scanning with the laser beam projected by the X-Y mirror and displaying the OBIC current generated in the interface circuit in synchronism with the scanning the X-Y stage
FIG. 9 shows an example of conventional luminous analysis system indicated in N.Tsutsu er al: IEEE 1992 Int. Conf. on Microelectronic Test Structure, Vol. 5, March, p94 (1992). The object lens 1a of the optical microscope 1 faces downward as in FIGS. 7 and 8 and the semiconductor chip 2 is placed therebelow. The semiconductor chip 2 is biased with voltage or pulse signal by means oi a bias power supply or a pulse generating device although the representation thereof is omitted in this Figure. When this voltage Or pulse signal is applied to the semiconductoro chip, weak light is generated from the semiconductor chip 2. This light is detected by means of a photon counting camera 14 through a waveform filter 13 and displayed on the display 8 by means of an image processing device 15. Consequently, it is possible to detect a defect of a p-n junction or thin silicon oxide iilm. Numeral 8a designates a controller of the display 8.
In the aforementioned OBIC analysis apparatus and luminous analysis apparatus, the front side of the semiconductor chip in which an electrode pad or metallic wiring is disposed is irradiated with a laser beam from the front thereof and projected light is detected. However, in recent semiconductor devices, the metallic wiring on the iront side of the semiconductor chip has been configured in a multi-layer or an LOC package in which an internal lead disposed on the surface of the semiconductor chip has been utilized, so that substance intercepting light beam has been often utilized on the front side of the semiconductor chip. Thus, the OBIC analysis and luminous analysis have become difficult to do. As a result, a method in which infrared laser light is irradiated from the rear side of the semiconductor to perform OBIC analysis as shown in T. Ishii et al: IEICE Technical Report, R91-34, p29(1991),and a method in which infrared light is detected from the rear side of the semiconductor to perform luminous analysis as indicated in E. Inuzuka et al: 3rd Eur. Symposium on Rel. of Electron devices, Failure phys. and analysis, Proc., p269(1992) and the like have been considered.
Although the aforementioned apparatus are conventionally available for analyzing a failure or a defect of a semiconductor device, a bias voltage, or a pulse signal is only applied to a specific position of the semiconductor chip at the time oi analysis and the analysis is not executed with the semiconductor chip being practically actuated. Thus, the conventional apparatus are not capable of detecting an active failure or defect of the semiconductor chip. In the conventional OBIC analysis or luminous analysis executed from the rear side of the semiconductor chip, because a semiconductor device is formed by sealing a semiconductor chip in a package, the analysis is performed after part of the rear portion of the package is removed to expose the semiconductor chid or equivalent processing is performed. There were no apparatuses which were capable of such an analysis from the rear side of the semiconductor wafer. Particularly, unless a product determined to be defective by functional test after wafer processing ends is subjected to defect analysis in one wafer state, it is not possible to expect a rapid improvement of fabrication yield and quality.